Application of soft processors for testing integrated digital peripherals in monolithic FPGA chips

Author: FILIP GEMBEC

Mentor: JASMIN REDŽEPAGIĆ

Faculty: VISOKO UČILIŠTE ALGEBRA

Country: Croatia

e-mail: jasmin.redzepagic@racunarstvo.hr

The work presents a demonstration of testing integrated digital peripherals using soft processors (completely built inside FPGA chips) and analyzing their output values with an integrated logic analyzer in the FPGA industry.